PROGRAM SYSTEMS: THEORY AND APPLICATIONS

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Online Scientific Journal published by the Ailamazyan Program Systems Institute of the Russian Academy of Sciences

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• Содержание выпуска •
• Software and Hardware for Distributed Systems and Supercomputers •
• Supercomputing Software and Hardware •
• Mathematical Foundations of Programming •

Supercomputing Software and Hardware

Responsible for the Section: Sergei Abramov, Dr. Phys.-Math.Sci., corresponding member of RAS

On the left: assigned number of the paper, submission date, the number of A5 pages contained in the paper,
and the reference to the full-text PDF .

Article # 2_2018 16 с. PDF	submitted on 25th Dec 2017 displayed on website on 01th Feb 2018 Dmitri Knyazkov Inverse problem of diffraction of electromagnetic wave on a plane layer In the current paper, an inverse problem of synthesis of a diffraction plane layer transparency function is considered. An image with the desired quality should be constructed in a registration plane as a result of illuminating the diffraction layer with the electromagnetic wave. The gradient method of computation is used to solve the problem. It allows to reach the desired image quality in the observation plane. The parallel algorithm is implemented for a cluster supercomputer. The program shows linear speedup for the the used computational systems. The computations are performed at the MVS-100K JSCC RAS and HybriLIT LIT JINR computational clusters. (In Russian). Key words: diffraction, inverse problem, gradient optimization, high performance computations.
article citation	http://psta.psiras.ru/read/psta2018_1_21-36.pdf
DOI	https://doi.org/10.25209/2079-3316-2018-9-1-21-36
Article # 3_2018 16 с. PDF	submitted on 24th Nov 2017 displayed on website on 01th Feb 2018 Nikolay Dikarev, Boris Shabanov, Aleksandr Shmelev Simulation of multicore vector dataflow processor with shared memory A Dataflow processor can execute up to 16 instructions per cycle compared to 4 to 6 instructions of the best von Neumann processors. Simulation of the vector dataflow processor (VDP) showed that it is possible to raise its core vector performance up to 256 flops per clock, and using modern manufacturing process to implement up to 4 such cores on a single die. Simulation results of the matrix multiplication program and 2D Stencil on double core VDP with shared memory are given in this paper. It is shown that the matrix multiplication program scales well on VDP, while the performance of 2D Stencil is limited by the shared memory bandwidth. (In Russian). Key words: supercomputer, vector processor, dataflow architecture, performance evaluation, matrix multiplication, 2d stencil.
article citation	http://psta.psiras.ru/read/psta2018_1_37-52.pdf
DOI	https://doi.org/10.25209/2079-3316-2018-9-1-37-52

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